.. a pragmatic author. His topics ... very accessible and pertinent to the engineering community ... Focus is to learn by example -- Synplicity, Andrew R. Dauman, Vice-President of Corporate Applications
.. best investments that a logic designer can make. ... of enormous value to all those involved in HDL-based chip design .. -- Rahul Razdan, Corporate Vice President - Systems and Functional Verification.
Product Description
This book addresses the practical and real aspects of logic design, processes, and verification. It incorporates a collection of FPGA and ASIC design practices expressed with Verilog and VHDL. Topics: 1. Architectural decomposition process; 2. Fundamental elements including synchronous edge detector, counter styles (e.g., Binary, One-Hot, Gray, Johnson), memories (ROM. RAM, FIFO), EDAC, cell primitives and impact on architecture, clocking schemes and PLL; 3. Asynchronous world, metastability, asynchronous FIFO, crossing clock domains; 4. Transaction-based verification methodology, forcing errors, counter and EDAC verification models; 5. Control machines and implementation methodologies with FSM and microprogrammed solutions; 6. Arithmetic machines, HDL Signed and Unsigned types; 7. Mixed mode simulations and synthesis; 8. Minimizing design errors; 9. Verilog/VHDL comparison, Verilog for VHDL users, Verilog coding style guidelines.
See all Editorial Reviews